Semiconductor devices, such as, complementary metal oxide semiconductor (CMOS) integrated circuits, generally include field effect transistors (FETs) which are disposed in a single plane of a semiconductor substrate. Basically, semiconductor devices can be bulk semiconductor-type devices or semiconductor-on-insulator-type devices, such as, silicon-on-insulator (SOI) devices. Bulk semiconductor devices can include field effect transistors (FETs) which are manufactured as lateral or vertical devices disposed on a silicon substrate.
In bulk semiconductor-type devices which have lateral FETs, a top surface of the substrate is doped to form source and drain regions, and a gate conductor is provided on the top surface of the semiconductor substrate between the source and drain regions. In operation, an electric field is generated in a channel region between the source and drain regions (e.g., below the gate conductor) by an electric signal provided to the gate conductor. The electric field causes charge carriers to be conducted across the channel region along essentially the top surface of the semiconductor substrate. The electric field penetrates the channel region from one direction because the gate conductor is only located over the top surface of the channel region. The current density associated with the FET is somewhat limited because the current only travels near the top surface of the substrate (e.g., the current is one dimensional).
In bulk semiconductor-type devices which have vertical FETs, the semiconductor substrate, such as, a silicon substrate, is etched to form trenches or steps. The gate of the vertical transistor is disposed on a side wall of the trench or step. A channel region is located adjacent to the side wall. Due to its small lateral size, the vertical transistor generally allows more devices to be contained than a single semiconductor substrate. Similar to conventional lateral FETs discussed above, the gate conductors are disposed on only one side of the channel region, and the current density associated with the vertical FET is somewhat limited.
Bulk semiconductor-type devices can be subject to some disadvantageous properties, such as, less than ideal subthreshold voltage slope during operation, high junction capacitance, and ineffective isolation. Additionally, bulk semiconductor-type devices often require epilayers, P-wells, or N-wells which require additional fabrication steps.
SOI (e.g., silicon-on-insulator) devices have significant advantages over bulk semiconductor-type devices, including near ideal subthreshold voltage slope, low junction capacitance, and effective isolation between devices. SOI-type devices generally completely surround a silicon or other semiconductor substrate with an insulator. Devices, such as, FETs or other transistors, are disposed on the silicon by doping source and drain regions and by providing gate conductors between the source and drain regions. SOI devices provide significant advantages, including reduced chip size or increased chip density, because minimal device separation is needed due to the surrounding insulating layers. Additionally, SOI devices can operate at increased speeds due to reductions in parasitic capacitance.
Similar to conventional bulk semiconductor-type devices discussed above, conventional SOI devices have somewhat limited current density because the gate conductor is provided only on one side of the channel region. Additionally, conventional SOI devices generally have a floating substrate (the substrate is often totally isolated by insulating layers). Accordingly, SOI devices are subject to floating substrate effects, including current and voltage kinks, thermal degradation, and large threshold voltage variations.
SOI devices also can have some limited packing densities because they are limited in vertical integration. Generally, SOI devices are only comprised of a single SOI layer.
Thus, there is a need for an SOI device which has improved density and improved vertical integration. Further, there is a need for an SOI device which includes an FET which has improved density, increased operating speed, and higher current density. Further still, there is a need for a multilayer SOI device.